title: |
Application of Hardware Architecture of Genetic Algorithm for Optimal Packet Scheduling |
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publication: |
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part of series: |
Advances in Intelligent Systems Research | |
ISBN: |
978-90-78677-01-7 | |
ISSN: |
1951-6851 | |
DOI: |
doi:10.2991/jcis.2006.299 (how to use a DOI) | |
author(s): |
Rong-Hou Wu, Yang-Han Lee, Shiann-Tsong Sheu, Hsien-Wei Tseng, Ming-Hsueh Chuang, Yung-Kuang Wang |
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corresponding author: |
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publication date: |
October 2006 |
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keywords: |
Genetic algorithm, Dense Wavelength Division Multiplexing, packet scheduling. |
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abstract: |
In Dense Wavelength Division Multiplexing (DWDM) technologies, the optimal packet scheduling is a common encounter issue in multiple channels network. NP-hard problem deals with finding a way to rearrange packets in multiple channels into a finite and rare channel. Genetic algorithm (GA) is one of the most efficient ways to solve this issue. We hope to find a better solution to our task through the GA characteristics of multiprocessor searching and survivor of the fittest. Therefore, a modified and achievable hardware architecture of GA is presented in this paper. This architecture can increase the schedule speed of packet scheduling also can promote the efficiency of DWDM in Optical Communication Networks. |
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copyright: |
©
Atlantis Press. This article is distributed under the
terms of the Creative Commons Attribution License, which permits
non-commercial use, distribution and reproduction in any medium,
provided the original work is properly cited. |
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full text: |