title: |
An Efficient CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphics Rendering |
|
publication: |
||
part of series: |
Advances in Intelligent Systems Research | |
ISBN: |
978-90-78677-01-7 | |
ISSN: |
1951-6851 | |
DOI: |
doi:10.2991/jcis.2006.232 (how to use a DOI) | |
author(s): |
Tze-Yun Sung |
|
corresponding author: |
||
publication date: |
October 2006 |
|
keywords: |
Redundant CORDIC arithmetic, CORDIC algorithm, 3-D vector interpolation, high-throughput. |
|
abstract: |
High performance architectures for the data intensive and latency restrained applications can be achieved by maximizing both parallelism and pipelining. In this paper, the CORDIC based hardware primitives of 3-D rotation with high throughput 3-D vector interpolation are presented. The proposed architecture for 3-D vector interpolator, which is based on the redundant CORDIC arithmetic, has been implemented by VLSI. |
|
copyright: |
©
Atlantis Press. This article is distributed under the
terms of the Creative Commons Attribution License, which permits
non-commercial use, distribution and reproduction in any medium,
provided the original work is properly cited. |
|
full text: |