An Efficient CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphics Rendering
Tze-Yun Sung 0
0Dept. of Microelectronics Engineering, Chung Hua University
Available Online October 2006.
- https://doi.org/10.2991/jcis.2006.232How to use a DOI?
- Redundant CORDIC arithmetic, CORDIC algorithm, 3-D vector interpolation, high-throughput.
- High performance architectures for the data intensive and latency restrained applications can be achieved by maximizing both parallelism and pipelining. In this paper, the CORDIC based hardware primitives of 3-D rotation with high throughput 3-D vector interpolation are presented. The proposed architecture for 3-D vector interpolator, which is based on the redundant CORDIC arithmetic, has been implemented by VLSI.
- Open Access
- This is an open access article distributed under the CC BY-NC license.
Cite this article
TY - CONF AU - Tze-Yun Sung PY - 2006/10 DA - 2006/10 TI - An Efficient CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphics Rendering BT - 9th Joint International Conference on Information Sciences (JCIS-06) PB - Atlantis Press SP - 360 EP - 363 SN - 1951-6851 UR - https://doi.org/10.2991/jcis.2006.232 DO - https://doi.org/10.2991/jcis.2006.232 ID - Sung2006/10 ER -