Parallel Particle Filter Algorithm and Its FPGA Implementation
Authors
Xiaofeng Lu, Shuhui Wang, Zhiying Du, Dongbin Pei, Dingyuan Zheng, Tongchun Zuo
Corresponding Author
Xiaofeng Lu
Available Online January 2014.
- DOI
- 10.2991/ccit-14.2014.34How to use a DOI?
- Keywords
- parallel Particle Filter, FPGA, embedded vision
- Abstract
Visual target tracking is the key problem in intelligent video processing. Particle Filter is classic and effective in visual target tracking algorithms, but it needs to analyze a large amount of probability statistic, leading to high algorithm complexity and low calculation efficiency. FPGA provides a competitive alternative for hardware acceleration to these applications. In this paper, we modify Particle Filter algorithm and propose a FPGA-based hardware accelerating architecture. Experiments show the embedded architecture is robust and shows a great real-time performance.
- Copyright
- © 2014, the Authors. Published by Atlantis Press.
- Open Access
- This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).
Cite this article
TY - CONF AU - Xiaofeng Lu AU - Shuhui Wang AU - Zhiying Du AU - Dongbin Pei AU - Dingyuan Zheng AU - Tongchun Zuo PY - 2014/01 DA - 2014/01 TI - Parallel Particle Filter Algorithm and Its FPGA Implementation BT - Proceedings of the 2014 International Conference on Computer, Communications and Information Technology PB - Atlantis Press SP - 127 EP - 130 SN - 1951-6851 UR - https://doi.org/10.2991/ccit-14.2014.34 DO - 10.2991/ccit-14.2014.34 ID - Lu2014/01 ER -