An Efficient FPGA Architecture to Automatically Detect the Condition of Orange Fruit

DOI

10.2991/ahis.k.210913.050How to use a DOI?

Keywords

Background Subtraction method, Binarization, FPGA Implementation, Fruit classification, Image Processing

Abstract

Indian economy is highly dependent on agriculture and horticulture, with fruits serving as the primary source of the income. Fruit classification is a time-consuming process, and the conventional method of identifying based on naked-eye observation by experts is both time- consuming and induces eye fatigue. Images must be precise and in static environment to ensure that precision and output of the information collected are critical and viable. The work proposes automatic orange fruit classification system architecture and is being coded using VHDL language and implemented using SPARTAN 6 FPGA. To get optimized hardware architecture, the filter, feature extraction, and matching blocks are optimized in terms of hardware utilization. To retain the fruit properties at fruit extraction, Q-point numbers are noted. The results are compared and proven that the proposed architecture is efficient and is giving success rate of 88% in detecting the fruit condition effectively with fewer hardware resources.

Copyright

© 2021, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - N Renuka
AU  - Shivaputra
AU  - MD Rudresh
AU  - L Rathod Meenakshi
PY  - 2021
DA  - 2021/09/13
TI  - An Efficient FPGA Architecture to Automatically Detect the Condition of Orange Fruit
BT  - Proceedings of the 3rd International Conference on Integrated Intelligent Computing Communication & Security (ICIIC 2021)
PB  - Atlantis Press
SP  - 407
EP  - 413
SN  - 2589-4900
UR  - https://doi.org/10.2991/ahis.k.210913.050
DO  - 10.2991/ahis.k.210913.050
ID  - Renuka2021
ER  -