Proceedings of the First International Conference on Information Sciences, Machinery, Materials and Energy

The Design of real-time Image Compressing System Based on DSP and FPGA

Authors
Lin Lu, Xiaofeng Li
Corresponding Author
Lin Lu
Available Online July 2015.
DOI
https://doi.org/10.2991/icismme-15.2015.66How to use a DOI?
Keywords
Ping-pong buffer; XDAIS; FPGA; DSP; LVDS
Abstract
This paper comes up with a high frequency frame real-time image compression technology which is based on high frequency frame camera. On the basis of the technology, I designed a high-frequency frame real-time image processor hardware system that combined TMS320CDM642 with EP2C35 FPGA. Based on TI's DSP / BIOS and the JPEG2000 compression algorithm that supports XDAIS, and used two ping-pong SRAM structures, the system achieved 100 frames per second compression rate. At the same time, the Image Compressing System solved two problems of volume and speed, tested the collecting process and compressing process working simultaneously, and increased the speed of image compression dramatically.
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This is an open access article distributed under the CC BY-NC license.

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Proceedings
First International Conference on Information Sciences, Machinery, Materials and Energy
Part of series
Advances in Intelligent Systems Research
Publication Date
July 2015
ISBN
978-94-62520-67-7
ISSN
1951-6851
DOI
https://doi.org/10.2991/icismme-15.2015.66How to use a DOI?
Open Access
This is an open access article distributed under the CC BY-NC license.

Cite this article

TY  - CONF
AU  - Lin Lu
AU  - Xiaofeng Li
PY  - 2015/07
DA  - 2015/07
TI  - The Design of real-time Image Compressing System Based on DSP and FPGA
BT  - First International Conference on Information Sciences, Machinery, Materials and Energy
PB  - Atlantis Press
SP  - 335
EP  - 338
SN  - 1951-6851
UR  - https://doi.org/10.2991/icismme-15.2015.66
DO  - https://doi.org/10.2991/icismme-15.2015.66
ID  - Lu2015/07
ER  -