Proceedings of the Conference on Bridging Engineering Disciplines with AI and Machine Learning (BEDAIML 2026)

Machine Learning Based Early Power and Area Prediction for VLSI Circuits Using Regression Modelling

Authors
Ritul Shrivastava1, *, Jyoteesh Malhotra1
1Department of Electronics and Communication Engineering, National Institute of Technology, Delhi, New Delhi, India
*Corresponding author. Email: ritulgwl@gmail.com
Corresponding Author
Ritul Shrivastava
Available Online 4 June 2026.
DOI
10.2991/978-94-6239-697-5_28How to use a DOI?
Keywords
Machine Learning; VLSI Design; Power Estimation; Area Prediction; Linear Regression; Design Automation
Abstract

As a result of the rapid progress achieved in integrated circuit technology, modern VLSI systems are becoming highly complex. One of the major challenges faced during digital circuit design is the early estimation of power consumption and silicon area. Early and accurate estimation of these design parameters is critical to reduce design time and design efficiency. Conventional methods of estimation require complete synthesis and physical design tools, which are computationally expensive and require a lot of time. Using machine learning algorithms provides a promising solution to these challenges by learning relationships between circuit parameters and output metrics. This paper proposes a framework for estimating the power consumption and silicon area of digital circuits using design parameters such as bit width, operator count, logic depth, and operating frequency. A synthetic data set is generated to mimic different circuit configurations. This paper proposes a linear regression model to establish a relationship between design parameters and output metrics. The proposed method is implemented using Python and NumPy. Experimental results indicate that high accuracy can be achieved using a regression model with R2 values close to 1 for both power and area estimation. The proposed approach allows for rapid evaluation of design alternatives without the necessity of performing hardware synthesis for their implementation. This reduces the design exploration time significantly, making it easier for designers to optimize their designs efficiently during the early stages of design. The results validate the applicability of machine learning techniques for supporting VLSI design methodologies effectively.

Copyright
© 2026 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

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Volume Title
Proceedings of the Conference on Bridging Engineering Disciplines with AI and Machine Learning (BEDAIML 2026)
Series
Advances in Intelligent Systems Research
Publication Date
4 June 2026
ISBN
978-94-6239-697-5
ISSN
1951-6851
DOI
10.2991/978-94-6239-697-5_28How to use a DOI?
Copyright
© 2026 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

Cite this article

TY  - CONF
AU  - Ritul Shrivastava
AU  - Jyoteesh Malhotra
PY  - 2026
DA  - 2026/06/04
TI  - Machine Learning Based Early Power and Area Prediction for VLSI Circuits Using Regression Modelling
BT  - Proceedings of the Conference on Bridging Engineering Disciplines with AI and Machine Learning (BEDAIML 2026)
PB  - Atlantis Press
SP  - 338
EP  - 347
SN  - 1951-6851
UR  - https://doi.org/10.2991/978-94-6239-697-5_28
DO  - 10.2991/978-94-6239-697-5_28
ID  - Shrivastava2026
ER  -