Proceedings of the 2016 International Conference on Computer Science and Electronic Technology

Petri Net-based Modeling and VHDL Implementation of Digital Systems

Authors
Jun Wan
Corresponding Author
Jun Wan
Available Online August 2016.
DOI
https://doi.org/10.2991/cset-16.2016.26How to use a DOI?
Keywords
Petri net, modeling, digital system, VHDL
Abstract
Petri net-based digital systems modeling and hardware implementation method is well-studied. However, the existing methods are mainly applied to synchronous circuits. In this paper, a new approach is proposed for the modeling and VHDL implementation of digital systems based on an extended class of Petri nets. The generalized synchronous self-modifying net (GSSN) is defined to describe digital systems. Based on a new kind of D flip-flop, known as multi-input & multi-clock D flip-flop, the specific conversion algorithm from Petri nets models to VHDL codes is presented. A design example is given to illustrate the capabilities of the proposed approach. The approach presented in the paper is suitable for both asynchronous systems and synchronous systems.
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Proceedings
2016 International Conference on Computer Science and Electronic Technology
Part of series
Advances in Computer Science Research
Publication Date
August 2016
ISBN
978-94-6252-213-8
ISSN
2352-538X
DOI
https://doi.org/10.2991/cset-16.2016.26How to use a DOI?
Open Access
This is an open access article distributed under the CC BY-NC license.

Cite this article

TY  - CONF
AU  - Jun Wan
PY  - 2016/08
DA  - 2016/08
TI  - Petri Net-based Modeling and VHDL Implementation of Digital Systems
BT  - 2016 International Conference on Computer Science and Electronic Technology
PB  - Atlantis Press
SP  - 108
EP  - 111
SN  - 2352-538X
UR  - https://doi.org/10.2991/cset-16.2016.26
DO  - https://doi.org/10.2991/cset-16.2016.26
ID  - Wan2016/08
ER  -