Design and Verification of AMBA APB Protocol using Verilog HDL

Vishnu Vardhan Lakkaraju; Vijayalakshmi Chintamaneni; Nikhil Sitharam Marimganti; Prathima Likki; Venugopal Janaswamy; Swapna Tathireddy

doi:10.2991/978-94-6239-644-9_6

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Design and Verification of AMBA APB Protocol using Verilog HDL

Authors

Vishnu Vardhan Lakkaraju¹^{, *}, Vijayalakshmi Chintamaneni², Nikhil Sitharam Marimganti³, Prathima Likki³, Venugopal Janaswamy⁴, Swapna Tathireddy⁵

¹Associate Professor, Dept of Electronics and Communication Engineering, Kasireddy Narayan Reddy College of Engineering and Research, Accredited With NAAC (A+) Grade, An UGC Autonomous Institution, Affiliated To Jawaharlal Nehru Technological University, Hyderabad, Telangana, India

²Dept of Electronics and Communication Engineering, Malla Reddy Engineering College for Women, Accredited With NAAC (A+) Grade, An UGC Autonomous Institution, Affiliated To Jawaharlal Nehru Technological University, Hyderabad, Telangana, India

³Associate Professor, Dept of Electronics and Communication Engineering, Kasireddy Narayan Reddy College of Engineering and Research, Accredited With NAAC (A+) Grade, An UGC Autonomous Institution, Affiliated To Jawaharlal Nehru Technological University, Hyderabad, Telangana, India

⁴Ph. D – Management Science & Ph. D – Economics, Life Member – NIPM, Life Member-ISTD, Life Member – AIMA Alumni Association, Life Member-IAA & ICA, Fellow – I2 OR, Personnel Management-NIPM (Gold Medalist), Training Development-ISTD (Best Award Holder), Management –AIMA, Professor of MBA, Kasireddy Narayan Reddy College of Engineering & Research, Accredited with NAAC “A+” Grade, An UGC Autonomous Institution, Affiliated to Jawaharlal Nehru Technological University, Hyderabad, India

⁵Associate Professor, Kasireddy Narayan Reddy College of Engineering & Research, Accredited with NAAC “A+” Grade, An UGC Autonomous Institution, Affiliated to Jawaharlal Nehru Technological University, Hyderabad, India

^*Corresponding author. Email: vijji.lnctphd@gmail.com

Corresponding Author

Vishnu Vardhan Lakkaraju

Available Online 19 April 2026.

DOI: 10.2991/978-94-6239-644-9_6 How to use a DOI?
Keywords: AMBA; APB Protocol; Verilog HDL; Finite State Machine; Low Power Design; SoC; Test bench Verification; FPGA; Xilinx ISE; Embedded Systems
Abstract: This paper presents the design and verification of the AMBA Advanced Peripheral Bus (APB) protocol using Verilog HDL for low-power and area-efficient System-on-Chip (SoC) applications. The design leverages an optimized Finite State Machine (FSM) and improved logic to minimize switching activity, which leads to better power efficiency, faster timing, and reduced area usage compared to existing implementations [11]. To validate the design, a task-based test bench is developed that supports accurate signal control, structured read/write operations, and proper wait-state handling. The review of literature indicated that there is ample scope for further development. The research and development departments of various organizations are required to focus to update in their respective domain like communication technology etc. [12]. The dissemination of information / information retrieval system has to be updated because the technological explosion transforms at a faster rate. The communication technology related expertise caters very significantly the needs of various stake holders, society and very useful to various sectors like airlines industry in aviation sector besides other sectors. The system is implemented and simulated using Xilinx ISE. The results clearly demonstrate improvements in thermal performance, resource utilization, and overall design efficiency, making the APB protocol well-suited for embedded system applications.
Open Access: Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

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Volume Title: Proceedings of the Global Innovation and Technology Summit “AAROHAN 3.0”_Engineering track (GITS-EAS 2025)
Series: Advances in Engineering Research
Publication Date: 19 April 2026
ISBN: 978-94-6239-644-9
ISSN: 2352-5401
DOI: 10.2991/978-94-6239-644-9_6 How to use a DOI?
Open Access: Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

Cite this article

ris enw bib

TY  - CONF
AU  - Vishnu Vardhan Lakkaraju
AU  - Vijayalakshmi Chintamaneni
AU  - Nikhil Sitharam Marimganti
AU  - Prathima Likki
AU  - Venugopal Janaswamy
AU  - Swapna Tathireddy
PY  - 2026
DA  - 2026/04/19
TI  - Design and Verification of AMBA APB Protocol using Verilog HDL
BT  - Proceedings of the Global Innovation and Technology Summit “AAROHAN 3.0”_Engineering track (GITS-EAS 2025)
PB  - Atlantis Press
SP  - 72
EP  - 82
SN  - 2352-5401
UR  - https://doi.org/10.2991/978-94-6239-644-9_6
DO  - 10.2991/978-94-6239-644-9_6
ID  - Lakkaraju2026
ER  -

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