A Two-dimensional Analytical Model and Simulation for Dual Material Gate Junctionless Transistor
- S. Wagaj, Y. Chavan, S. Patil
- Corresponding Author
- S. Wagaj
Available Online December 2016.
- https://doi.org/10.2991/iccasp-16.2017.56How to use a DOI?
- Dual Material Gate (DMG); two-dimensional (2-D) modeling; silicon-on-insulator (SOI) MOSFET; Short channel ef-fects (SCEs).
- To investigate the short channel effect for Dual Material Gate Silicon on Insulator junction-less Transistor (DMG SOI JLT) of a two dimensional channel potential model is developed. This model is validated by simula-tion (COGENDA Visual TCAD) result. It has been observed that for a junction-less transistor with Dual Materi-al Gate (DMG) current driving capability improves secondly, channel potential step function that results drain voltage variation do not affect on barrier between source and channel due to the work function difference of the gate material. This increase in current driving capability increases and hot electron effect, Drain induced barrier lowering problem and reduces its dual material different work function structure.
- Open Access
- This is an open access article distributed under the CC BY-NC license.
Cite this article
TY - CONF AU - S. Wagaj AU - Y. Chavan AU - S. Patil PY - 2016/12 DA - 2016/12 TI - A Two-dimensional Analytical Model and Simulation for Dual Material Gate Junctionless Transistor BT - International Conference on Communication and Signal Processing 2016 (ICCASP 2016) PB - Atlantis Press SN - 1951-6851 UR - https://doi.org/10.2991/iccasp-16.2017.56 DO - https://doi.org/10.2991/iccasp-16.2017.56 ID - Wagaj2016/12 ER -