Cache Coherence Protocols in Shared-Memory Multiprocessors

DOI

10.2991/iccse-15.2015.52How to use a DOI?

Keywords

Cache coherence protocols, Shared-memory, Multiprocessor

Abstract

This paper is a review of the recent research about the design of cache coherence protocols in shared-memory multiprocessors. Two important aspects of shared memory systems are memory consistency and cache coherence. Two major available protocols for cache coherence problems are snoopy coherence and directory based coherence. The snoopy cache protocol is simple and easy to implement, but relies on a low-latency, shared interconnection among the processors and the memory modules. The directory-based multiprocessors communicate with a common directory whenever the processor's action may cause an inconsistency between its cache and the other caches or memory. No broadcast is necessary in this case and therefore the network medium may be of almost any kind. However, the overhead of directory maintenance and look-up time plus the high-latency of communication networks make the directory scheme unattractive. To prevent the directory from becoming the bottleneck, directory entries can be distributed along with the memory, so that different directory accesses can go to different locations.

Copyright

© 2015, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Xiuzhen Lian
AU  - Xiaoxi Ning
AU  - Mingren Xie
AU  - Farong Yu
PY  - 2015/07
DA  - 2015/07
TI  - Cache Coherence Protocols in Shared-Memory Multiprocessors
BT  - Proceedings of the 2015 International Conference on Computational Science and Engineering
PB  - Atlantis Press
SP  - 286
EP  - 289
SN  - 2352-538X
UR  - https://doi.org/10.2991/iccse-15.2015.52
DO  - 10.2991/iccse-15.2015.52
ID  - Lian2015/07
ER  -