Proceedings of the 2016 4th International Conference on Electrical & Electronics Engineering and Computer Science (ICEEECS 2016)

Time - triggered Ethernet Modeling and Evaluation Based on DSPN

Authors
Qi-feng Ren, Guo-quan Zhang, Qi-ming Yang, Jian-dong Zhang, Guo-wen Hu
Corresponding Author
Qi-feng Ren
Available Online December 2016.
DOI
https://doi.org/10.2991/iceeecs-16.2016.182How to use a DOI?
Keywords
Time-Triggered Ethernet; TTE; DSPN; Performance Evaluation
Abstract
The traditional on-board data bus has been unable to meet the characteristics of modern advanced avionics communications equipment. Time-Triggered Ethernet (TTE) has the advantages of real-time, determinism and reliability and can fully adapt to distributed synthesis Modular avionics architecture development. It is of theoretical significance to analyze the bus load and transmission delay in the network by establishing the message transmission model of time-triggered Ethernet with deterministic and stochastic Petri Nets (DSPN).
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Proceedings
2016 4th International Conference on Electrical & Electronics Engineering and Computer Science (ICEEECS 2016)
Part of series
Advances in Computer Science Research
Publication Date
December 2016
ISBN
978-94-6252-265-7
ISSN
2352-538X
DOI
https://doi.org/10.2991/iceeecs-16.2016.182How to use a DOI?
Open Access
This is an open access article distributed under the CC BY-NC license.

Cite this article

TY  - CONF
AU  - Qi-feng Ren
AU  - Guo-quan Zhang
AU  - Qi-ming Yang
AU  - Jian-dong Zhang
AU  - Guo-wen Hu
PY  - 2016/12
DA  - 2016/12
TI  - Time - triggered Ethernet Modeling and Evaluation Based on DSPN
BT  - 2016 4th International Conference on Electrical & Electronics Engineering and Computer Science (ICEEECS 2016)
PB  - Atlantis Press
SP  - 945
EP  - 950
SN  - 2352-538X
UR  - https://doi.org/10.2991/iceeecs-16.2016.182
DO  - https://doi.org/10.2991/iceeecs-16.2016.182
ID  - Ren2016/12
ER  -