A Low Power Implementation Strategy for SOC

DOI

10.2991/icsma-16.2016.61How to use a DOI?

Keywords

Low-power, SOC, master-slave, control.

Abstract

Low power consumption has become an extremely important design goal for system-on-chip(SOC). This paper analyzes the impact of power consumption on the digital chip and the composition of power consumption in the circuit, and then proposes a low-power implementation strategy for SOC system with embedded multi-core CPU. A master-slave control circuit is designed to reduce the static and dynamic power consumption of on-chip CPU and on-chip functional modules. Which not only improve the SOC chip on the functional modules and multi-core CPU switch flexibility, you can also reduce the total SOC system chip power consumption.

Copyright

© 2016, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Yiru Fu
AU  - Xu Huang
AU  - Xin Lei
AU  - Luncai Liu
AU  - Yingtai Li
PY  - 2016/12
DA  - 2016/12
TI  - A Low Power Implementation Strategy for SOC
BT  - Proceedings of the 2016 4th International Conference on Sensors, Mechatronics and Automation (ICSMA 2016)
PB  - Atlantis Press
SP  - 339
EP  - 345
SN  - 1951-6851
UR  - https://doi.org/10.2991/icsma-16.2016.61
DO  - 10.2991/icsma-16.2016.61
ID  - Fu2016/12
ER  -