Design and optimization of JFET region for high voltage 4H-SiC IGBT
Tongtong Yang, Runhua Huang, Song Bai
Available Online November 2016.
- https://doi.org/10.2991/aest-16.2016.124How to use a DOI?
- JFET; 4H-SiC; IGBT.
- The JFET region is an essential for IGBT devices. This paper mainly uses the Silvaco Atlas simulation tool to investigate the dependence of the characteristics of IGBT on JFET region. The simulations focus on the study of the width and concentration of JFET region at different interface charge densities. The results show that there is a paradox between the optimization of turn-on characteristics and blocking characteristics of IGBT devices. The best combinations of width and concentration at different charge densities are determined in considerations of both the turn-on and blocking characteristics. The simulation results show that a JFET width of 3æm and a doping concentration of 6e15cm-3 are the best combination in most situations for high voltage (>20kV) IGBT devices.
- Open Access
- This is an open access article distributed under the CC BY-NC license.
Cite this article
TY - CONF AU - Tongtong Yang AU - Runhua Huang AU - Song Bai PY - 2016/11 DA - 2016/11 TI - Design and optimization of JFET region for high voltage 4H-SiC IGBT BT - 2016 International Conference on Advanced Electronic Science and Technology (AEST 2016) PB - Atlantis Press SP - 936 EP - 942 SN - 1951-6851 UR - https://doi.org/10.2991/aest-16.2016.124 DO - https://doi.org/10.2991/aest-16.2016.124 ID - Yang2016/11 ER -