Design and Implementation of FSK Modulation and Demodulation Module Using CPLD

DOI

10.2991/icacsei.2013.70How to use a DOI?

Keywords

FSK modulation and demodulation, CPLD, single chip, bit synchronization

Abstract

According to the working principle of digital FSK modulation and demodulation, two kinds of circuit schemes based on CPLD and single chip are compared. The circuit module of FSK modulation and demodulation based on CPLD is designed, and CPLD is programmed by Quartus II software to carry out the function of FSK modulation and demodulation. The single chip ATMEGA16 is programmed by IAR FOR AVR software to carry out the function of bit synchronization, and it can communicate with outside by SPI interface. Both simulations and experimental tests prove the exactness of design through building up the actual circuit.

Copyright

© 2013, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Lihua Wu
AU  - Yu Huang
PY  - 2013/08
DA  - 2013/08
TI  - Design and Implementation of FSK Modulation and Demodulation Module Using CPLD
BT  - Proceedings of the 2013 International Conference on Advanced Computer Science and Electronics Information (ICACSEI 2013)
PB  - Atlantis Press
SP  - 281
EP  - 283
SN  - 1951-6851
UR  - https://doi.org/10.2991/icacsei.2013.70
DO  - 10.2991/icacsei.2013.70
ID  - Wu2013/08
ER  -