Design and VLSI implementation of a Java System-on-Chip

DOI

10.2991/iccsee.2013.415How to use a DOI?

Keywords

Java SoC, AMBA, VLSI, benchmark score

Abstract

A new architecture of Java System-on-Chip (SoC) is proposed for executing Java bytecodes directly. This Java SoC integrates a Java core, a Floating Point Unit (FPU), a Direct Memory Access (DMA) controller, and some other popular peripheral controllers on a single chip. All modules are interconnected with Advanced Microcontroller Bus Architecture (AMBA) standard buses. IO reuse is adopted to reduce the number of chip pins. The proposed SoC is implemented in very large scale integration (VLSI) of 130nm CMOS Logic process. After being taped-out and packaged, the chip is tested with a verification board. The performance is evaluated by Dhrystone and Whetstone benchmarks. The running results show that the proposed SoC has a better performance compared with VP6000 and JOP3.

Copyright

© 2013, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Xuming Lu
AU  - Desheng Yang
AU  - Hongzhou Tan
PY  - 2013/03
DA  - 2013/03
TI  - Design and VLSI implementation of a Java System-on-Chip
BT  - Proceedings of the 2nd International Conference on Computer Science and Electronics Engineering (ICCSEE 2013)
PB  - Atlantis Press
SP  - 1658
EP  - 1661
SN  - 1951-6851
UR  - https://doi.org/10.2991/iccsee.2013.415
DO  - 10.2991/iccsee.2013.415
ID  - Lu2013/03
ER  -