Multi-DSP and FPGA-based Image Acquisition and Processing Platform

DOI

10.2991/icfcce-14.2014.40How to use a DOI?

Keywords

EMIF, Parallel processing, A/D acquisition, Digital image processing.

Abstract

To meet the complexity of digital image processing algorithms and the development trend of the modular process, proposed multi-DSP and FPGA based digital image processing platform. Four TI's DSP of C6455 family as platform cores, and FPGA of Virtex-4 family as a system coordinated controller, achieve the four DSP interconnect, complete real-time, high-speed, parallel digital image processing system. Four DSP and FPGA connected to the EMIF interface, through which switch and transfer the data flow and the instruction stream, each costing DSP is equipped with DDR memory, to help DSP to complete the transfer of data and instruction memory, and out through one of the PCI expansion interface and Ethernet port. The image acquisition is controlled by the FPGA, and achieved by the ADC chip, which is the ADS5270 with four 8-channel, 12-bit precision, 40MSPS sampling rate, together constitute the analogue signal of 32-channel acquisition module. Ultimately complete image acquisition and signal processing platform.

Copyright

© 2014, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Liping Chen
AU  - FuHai Han
AU  - Zhifeng Ma
PY  - 2014/03
DA  - 2014/03
TI  - Multi-DSP and FPGA-based Image Acquisition and Processing Platform
BT  - Proceedings of the 2014 International Conference on Future Computer and Communication Engineering
PB  - Atlantis Press
SP  - 160
EP  - 163
SN  - 1951-6851
UR  - https://doi.org/10.2991/icfcce-14.2014.40
DO  - 10.2991/icfcce-14.2014.40
ID  - Chen2014/03
ER  -