Low-power Design of Digital Integrated Circuit Based on UPF Standard
- https://doi.org/10.2991/icimm-16.2016.23How to use a DOI?
- Low power consumption, power gating, integrated circuit.
At present, power consumption has become a factor in design of integrated circuit with growing concern in addition to timing and area. Currently, there are many methods to reduce power consumption. In the paper, standard complete technique of Unified Power Format (UPF) based on IEEE1801 standard is used in the design realization and verification process of one chip in order to utilize various design methods of low power consumption more effectively in design implementation flow. The whole process from RTL to GDSII is successfully completed. Chip test is successfully completed. In the paper, the design realization part thereof is discussed in details. How to describe low power consumption intention with UPF and how to use Synopsys tool to realize the whole process are mainly introduced. In the paper, some methods of low power consumption design are firstly introduced, which are commonly used at present, the realization method with power-gating is specially utilized to control statistic power consumption and UPF. Then, the application of UPF in the design is described, and conclusion is given finally.
- © 2016, the Authors. Published by Atlantis Press.
- Open Access
- This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).
Cite this article
TY - CONF AU - Yuncheng Lu PY - 2016/11 DA - 2016/11 TI - Low-power Design of Digital Integrated Circuit Based on UPF Standard BT - Proceedings of the 6th International Conference on Information Engineering for Mechanics and Materials PB - Atlantis Press SP - 108 EP - 112 SN - 2352-5401 UR - https://doi.org/10.2991/icimm-16.2016.23 DO - https://doi.org/10.2991/icimm-16.2016.23 ID - Lu2016/11 ER -