Improved Generalized Disjunction Decomposition for Circuit Evolutionary Design

DOI

10.2991/icaees-15.2015.66How to use a DOI?

Keywords

Evolvable Hardware; Evolutionary Design; Scalability; Short Link Priority; Generalized Disjunction Decomposition

Abstract

Evolvable Hardware can be used to design circuits automatically. The main difficulty of applying real-world applications is its scalability. This paper focuses on improving the scalability of combinational logic circuit evolutionary design. We proposed a complex circuit design method combined Generalized Disjunction Decomposition (GDD) with Short Link Priority mutation evolutionary strategy. The proposed method can evolve complex circuit and use fewer logic gate compared with GDD. The experimental results validated the performance of our method.

Copyright

© 2015, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Yong Lin
PY  - 2015/07
DA  - 2015/07
TI  - Improved Generalized Disjunction Decomposition for Circuit Evolutionary Design
BT  - Proceedings of the 3rd International Conference on Advances in Energy and Environmental Science 2015
PB  - Atlantis Press
SP  - 357
EP  - 361
SN  - 2352-5401
UR  - https://doi.org/10.2991/icaees-15.2015.66
DO  - 10.2991/icaees-15.2015.66
ID  - Lin2015/07
ER  -