Study on Electrical Performance of FC and WB in IC Ceramic Package

DOI

10.2991/icmemtc-16.2016.317How to use a DOI?

Keywords

ceramic package; flip chip; wire bond; parasitic parameters; return loss; insertion loss

Abstract

As the signal frequency of integrated circuit keeps increasing, parasitic effects caused by the interconnect transmission structure used in IC ceramic package is becoming important factor which will influence the transmission performance of the signal path. In this paper, parasitic parameters (Resistance, Capacitance and Inductance) and scattering parameters of the differential pair are analyzed through three-dimensional electromagnetic software simulation based on the characterization of ceramic package structure. Then from the point of scattering parameters, the frequency domain whether wire bonding or flip chip is suitable is also analyzed. The result showed that the return loss of wire bonding interconnection would be great when the signal frequency is above 5GHz, and flip chip would improve the transmission performance of high-frequency signal remarkably when compared with wire bonding in the condition of same routing, and so flip chip is preferably in high-speed IC package.

Copyright

© 2016, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Dejing Wang
AU  - Yuanfu Zhao
AU  - Quanbin Yao
AU  - Yusheng Cao
AU  - Binhao Lian
AU  - Hongshuo Zhang
PY  - 2016/04
DA  - 2016/04
TI  - Study on Electrical Performance of FC and WB in IC Ceramic Package
BT  - Proceedings of the 2016 3rd International Conference on Materials Engineering, Manufacturing Technology and Control
PB  - Atlantis Press
SP  - 1670
EP  - 1675
SN  - 2352-5401
UR  - https://doi.org/10.2991/icmemtc-16.2016.317
DO  - 10.2991/icmemtc-16.2016.317
ID  - Wang2016/04
ER  -