Research and Design of Low-Frequency RFID Tag Chip Based on FPGA

DOI

10.2991/mecae-18.2018.19How to use a DOI?

Keywords

Radio frequency identification (RFID), field programmable gate array (FPGA), special RF circuit, simplified instruction.

Abstract

For the limitation of the low-frequency tag chip, a new type of low-frequency radio frequency identification (RFID) tag chip is designed based on the field programmable gate array (FPGA) platform. During the research, FPGA is selected as the microprocessor, with the RF circuit, taking active RFID work to generate signal and process rapidly. The peripheral part of the processor uses the discrete components to design the hardware circuit to achieve the modulation and demodulation function of the coupling signal. Before the digital signal arrived at the RF, it needs to be processed by the internal logic of FPGA. The results reveal that the entire chip system shows a good reading and writing ability and recognition distance, highly restitutes the modulating signal which has not obviously coupling signal, and the simplified instruction optimizes the process, enables the chip to be widely used in more rapid industrial applications.

Copyright

© 2018, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Dong Wang
AU  - Weiping Jing
PY  - 2018/03
DA  - 2018/03
TI  - Research and Design of Low-Frequency RFID Tag Chip Based on FPGA
BT  - Proceedings of the 2018 International Conference on Mechanical, Electronic, Control and Automation Engineering (MECAE 2018)
PB  - Atlantis Press
SP  - 106
EP  - 111
SN  - 2352-5401
UR  - https://doi.org/10.2991/mecae-18.2018.19
DO  - 10.2991/mecae-18.2018.19
ID  - Wang2018/03
ER  -