Cascaded Sigma-Delta modulator with dual quantization architecture and an inter-stage feedback path

DOI

10.2991/nceece-15.2016.62How to use a DOI?

Keywords

analog-to-digital converter (ADC); nonlinear distortion; dual quantization architecture; SNDR.

Abstract

The conventional Sigma-Delta modulators have several drawbacks: e.g. the major problem with dual quantization architecture is that it can only be applied in a single loop topology, which causes the dynamic range (DR) problem; The inter-stage feedback topology only cancels nonlinear errors by introducing multi-bit DAC in its final stage. However, the rest of the stages still contain DAC nonlinearity errors without any noise shaping, which still degrade overall system performance. We propose a new structure, specifically a third-order (1-2) cascaded Sigma-Delta modulator with two 1-bit quantizers and an inter-stage feedback path. The main advantage is its 6dB reduction of total output noise power as compared with a conventional second-order Sigma-Delta modulator. We derive the output expression of various Sigma-Delta modulators in closed form. The advantage of the proposed modulator is confirmed by a system level simulation program.

Copyright

© 2016, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Xie Yu
PY  - 2015/12
DA  - 2015/12
TI  - Cascaded Sigma-Delta modulator with dual quantization architecture and an inter-stage feedback path
BT  - Proceedings of the 2015 4th National Conference on Electrical, Electronics and Computer Engineering
PB  - Atlantis Press
SP  - 307
EP  - 311
SN  - 2352-5401
UR  - https://doi.org/10.2991/nceece-15.2016.62
DO  - 10.2991/nceece-15.2016.62
ID  - Yu2015/12
ER  -